Technical Lecture Session
Impedance, Delay, Stability
This paper proposes a concept of "impedance valley" in the output impedance of inverter, which is directly caused due to the existence of digital control delay. At the impedance valley, the magnitude of the output impedance drops sharply, while the phase rises distinctly. For the first time, the internal and detailed influence of delay on dq-frame output impedance of inverter are analyzed. Simultaneously, the influence of the impedance valley on the stability of the grid-tied inverter is assessed through d-d channel impedance matching, and Generalized Nyquist Criterion. It is found that current loop dynamics and delay value variations result in both severe magnitude and phase change in d-d channel impedance, which are the leading causes to high-frequency oscillation in the grid-tied system.