Control of Power Electronic Converters
Technical Lecture Session
Control of DC-AC Inverters
Phase-locked loop (PLL), grid synchronization, decoupling networks, delay compensation, grid faults, low sampling frequency, robust
The phase-locked loop (PLL) is a critical component for synchronization of power converters to the grid. To improve positive sequence detection during non-ideal operating conditions including grid faults, high voltage unbalance, high-frequency harmonics, and DC offsets, the introduction of harmonic decoupling networks (DN) as PLL pre-filters has been proposed in the literature. In some applications such as medium-voltage converters, low sampling frequency is necessary, and present harmonic decoupling solutions do not perform satisfactorily. Delay-compensated decoupling networks (DCDN) are proposed in this paper, which, in combination with a linear PLL (L-PLL), exhibit excellent performance improvement at low sampling frequencies.